The present invention relates to a profile extraction method and a profile extraction apparatus.
In recent years, as further miniaturization of MOSFET devices has been achieved through advances in integration technology such as LSI, it has become difficult to directly detect the impurity concentration distribution (hereafter referred to as xe2x80x9cprofilexe2x80x9d) from a device at the actual product level (hereafter referred to as xe2x80x9cactual devicexe2x80x9d). Since various characteristics are affected by the profile in a MOSFET, it is crucial that accurate profile extraction be achieved in order to realize a higher degree of efficiency in production. Such circumstances have rendered even more importance to the inverse modeling technology, i.e., the technology through which the profile is extracted through simulation implemented by utilizing the electrical characteristics measured from the device.
The profile extraction methods in the prior art that employ the inverse modeling technology include, for instance, the method disclosed in K. Khalil et al., IEEE EDL-16 (1), p.17, 1995. In the profile extraction method disclosed in this publication, the capacity-voltage characteristics (hereafter referred to as xe2x80x9cC-V characteristicsxe2x80x9d) of various TEG patterns and sample devices are utilized as the electrical characteristics. In this context, xe2x80x9cTEGxe2x80x9d stands for xe2x80x9ctest element groupxe2x80x9d, which means a test piece group. In addition, a sample device refers to a device exclusively used for testing, which is prepared at a size that allows measurement through processes similar to those for manufacturing an actual device.
The method disclosed in Z. K. Lee et al., IEDM Tech. Dig. pp. 683, 1997 is another example of a profile extraction method adopting the inverse modeling technology. In the profile extraction method disclosed in this publication, the currentvoltage characteristics (hereafter referred to as xe2x80x9cI-V characteristicsxe2x80x9d) of one device only are utilized as the electrical characteristics, and the channel profile is extracted with the source/drain profile (hereafter referred to as xe2x80x9cS/D profilexe2x80x9d) remaining fixed. In this context, the S/D profile refers to impurity concentration distribution in the source area/drain area, and the channel profile refers to the impurity concentration distribution in the substrate area formed under the gate electrodes.
However, the profile extraction methods in the prior art described above require a special TEG pattern or a large sample device to obtain measured values representing the electrical characteristics, and moreover, there is a possibility that the extracted profile which is the profile of a sample device or the like may be different from the profile of the actual device.
In addition, when a two-dimensional channel profile with the direction of the length of the channel assuming one dimension and the direction of the depth of the channel assuming the other dimension is extracted with the S/D profile fixed, the extracted two-dimensional channel profile may not be utilized for other MOSFETs having different S/D profiles. Furthermore, since the two-dimensional channel profile is determined based upon the electrical characteristics of one device in the prior art, there is a possibility that the extracted two-dimensional channel profile cannot assure the electrical characteristics of another device with different design requirements such as, for instance, a different gate length. It is to be noted that the gate length refers to the distance from the drain end to the source end.
Moreover, since the sensitivity of the two-dimensional channel profile with respect to the electrical characteristics decreases as the gate length is increased in a MOSFET, accurate profile extraction is difficult in the profile extraction methods in the prior art. Also, since it is necessary to perform individual calculations for each device in the profile extraction methods in the prior art, the length of time required for calculation increases as the number of devices for extraction increases.
An object of the present invention, which has been completed by addressing the problems of the profile extraction methods in the prior art discussed above, is to provide a new and improved profile extraction method and a new and improved profile extraction apparatus that make it possible to extract a profile from an actual semiconductor device.
Another object of the present invention is to provide a new and improved profile extraction method and a new and improved profile extraction apparatus through which, an S/D profile as well as a channel profile can be extracted.
Yet another object of the present invention is to provide a new and improved profile extraction method and a new and improved profile extraction apparatus that are capable of achieving extraction results which assure profiles of a plurality of semiconductor devices having different gate lengths.
Yet another object of the present invention is to provide a new and improved profile extraction method and a new and improved profile extraction apparatus in which calculation is simpler and is executed faster.
Normally, in a semiconductor device such as a MOSFET, the source area and the drain area, which have higher impurity concentrations than the substrate area under the gate electrodes, are highly conductive. Consequently, the effect of the S/D profile on the electrical characteristics is not taken into consideration when performing profile extraction in the prior art. However, channel profiles in the vicinity of the source end and in the vicinity of the drain end are subject to the effect of the S/D profile due to factors such as impurity ion implantation implemented during the formation of the source area and the drain area. When the channel profile is under the influence of the S/D profile in this manner, while the electrical characteristics in a semiconductor device having a large gate length are only affected to a small enough degree to be disregarded, the electrical characteristics in a semiconductor device having a small gate length are affected to a significant degree that cannot be disregarded.
The inventor of the present invention has learned that the reverse short channel effect, which is known only through experience, can be explained by incorporating the above observation. The reverse short channel effect in this context refers to a phenomenon in which the threshold voltage temporarily rises before the short channel effect becomes pronounced. It is to be noted that the short channel effect refers to a phenomenon in which the threshold voltage falls drastically as the gate length is reduced in a semiconductor device such as a MOSFET. It is known in the prior art that the short channel effect is caused by the depletion layer extending from the drain area and the depletion layer extending from the source area projecting out to the substrate area under the gate electrodes. However, the cause of the reverse short channel effect has not yet been clarified.
FIG. 5 presents the results of measurement of the characteristics of the threshold voltage Vth relative to the gate length Lg (hereafter referred to as the xe2x80x9cVth-Lg characteristicsxe2x80x9d) in a MOSFET with the substrate bias voltage Vsub set at 0, xe2x88x923 and xe2x88x925. In FIG. 5, a parameter k that indicates the shape of the drain end is incorporated, with the dotted line representing the results of measurement performed when k=1.0 and the solid line representing the results of measurement performed when k=2.0. As FIG. 5 illustrates, the Vsub dependency of the Vth-Lg characteristics is sensitive to change in the shape of the S/D profile when the substrate bias voltage Vsub is not 0 (Vsub =xe2x88x923, xe2x88x925).
The above observation leads to the conclusion that the effect of the S/D profile must be fully considered in order to accurately extract the channel profile of a semiconductor device.
Accordingly, in order to achieve the objects described above, the profile extraction method for extracting a profile of a semiconductor device adopts a structure comprising a first stage in which a two-dimensional channel profile which demonstrates dependency on the gate length is extracted based upon specific electrical characteristics and a virtual channel profile, a second stage in which a source/drain profile is extracted based upon the dependency on a specific application voltage that the specific electrical characteristics demonstrate and the two-dimensional channel profile and a third stage in which the first stage and the second stage are repeated until the error of a calculated value relative to a measured value with respect to the dependency of the specific electrical characteristic on the specific application voltage is within an allowable error range.
Through the profile extraction method structured as described above, since the gate length dependency is included in the two-dimensional channel profile that is extracted, batch extraction of profiles of a plurality of devices having varying gate lengths becomes possible. In addition, in the two-dimensional channel profile extracted through this method, changes in the electrical characteristics occurring due to, for instance, the reverse short channel effect and varying gate lengths can be reproduced. In addition, since the S/D profile and the channel profile are both extracted through the method, a profile extraction that takes into consideration the influence of the S/D profile on the channel profile is achieved.
The dependency of the threshold voltage on the gate length may be utilized for the specific electrical characteristics. Through the profile extraction method structured as described above, an appropriate two-dimensional channel profile which demonstrates dependency on the gate length can be extracted by including the dependency on the gate length in the electrical characteristics used in the profile extraction. Furthermore, since, according to the observation made by the inventor of the present invention, the threshold voltage demonstrates a high degree of sensitivity to a channel profile (in particular the information in the direction of the depth of the channel profile), an improvement is achieved and the accuracy of the profile extraction by incorporating the threshold voltage in the electrical characteristics.
In addition, it is ideal to use the dependency of the threshold voltage on the gate length under a condition whereby the substrate bias voltage is 0 as the specific electrical characteristics. As FIG. 5, which has been referred to earlier, indicates, the characteristics of the threshold voltage relative to the gate length are not dependent upon the shape of the S/D profile under the condition whereby the substrate bias voltage is 0. Consequently, through the method in which the channel profile can be extracted in a state in which the S/D profile shape can be disregarded, an appropriate channel profile can be extracted. Furthermore, the substrate bias voltage can be utilized as the specific application voltage.
Moreover, according to the present invention, a structure that includes a pretreatment step for extracting the effective channel length in the first stage may be adopted. The channel profile extraction method structured as described above, in which the effective channel length that has a higher degree of sensitivity to the threshold voltage than the profile is extracted in advance, achieves even more accurate extraction of the target profile. It is to be noted that a great number of methods for extracting the effective channel length have been proposed in the prior art, and that any one of the various effective channel length extraction methods may be selected to be adopted in the channel profile extraction method according to the present invention.
In addition, a structure in which the virtual channel profile is a two-dimensional profile achieved by superimposing a profile constituted of an non-uniform component on a uniform profile that achieves a uniform distribution in the direction of the channel length may be adopted. The uniform profile, which is utilized in the channel profile extraction method structured as described above may be easily set by, for instance, uniformly distributing a one-dimensional channel profile, various extraction methods for which have been proposed in the prior art, in the direction of the channel length. As a result, the method according to the present invention, in which the two-dimensional profile extraction can be implemented while essentially modifying only the non-uniform component, achieves simplification in the arithmetic calculation processing to enable efficient profile extraction. It is to be noted that it is ideal to use a one-dimensional channel profile extracted from a long-channel device as the one-dimensional channel profile that is used for setting the uniform profile. As explained above, the influence of the S/D profile is small enough to be disregarded in a long channel device. In other words, there is essentially no difference between the electrical characteristics of a long channel device and the electrical characteristics of a device having a one-dimensional profile in the direction of the channel depth at the channel central area of the long channel device uniformly distributed in the direction of the channel length to achieve a uniform profile. Thus, it is possible to extract the one-dimensional channel profile at the channel central area of a long channel device with a high degree of accuracy from various electrical characteristics.
It is to be noted that the one-dimensional profile in the direction of the channel depth of a profile constituted of a non-uniform component may be set, for instance, based upon the results of a comparison of specific electrical characteristics of a device into which additional ions are implanted and a device into which no additional ions are implanted, or in correspondence to a specific manufacturing process. Alternatively, the one-dimensional profile may be expressed using one or more functions arbitrarily selected from a group of functions comprising exponential functions, delta functions, Gaussian functions and spline functions.
In all of the channel profile extraction methods according to the present invention that have been explained so far, the two-dimensional channel profile can be expressed using a model formula; C (x, y)=delta C pile-up (x, y)+delta CBD (x, y)+C bulk (y). In the formula, delta C pile-up represents the pile-up (accumulated) component in the impurity change quantity and delta CBD represents the accelerated diffusion component in the impurity change quantity. In addition, C bulk (y) represents the long channel profile.
In addition, the model formula above may be changed to C (x, y)=A*delta C pile-up (y)*exp (xe2x88x92x/lambda 1)+B*delta CBD (y)*exp (xe2x88x92x/lambda 2)+C bulk (y). It is to be noted that A and B are fitting parameters that may be determined independently of each other. In addition, x represents the coordinate in the direction of the channel length whereas y represents the coordinate in the direction of the channel depth. Furthermore, lambda 1 and lambda 2 represent the attenuation factors in the direction of the channel length of the pile-up component and the accelerated diffusion component respectively of the impurity change quantity. A channel profile extraction method adopting this modified model formula is capable of handling the reverse short channel effect with the assumption that the impurity concentration is reduced exponentially as the distance from the gate end/source end increases. Moreover, by dividing the exponential function term into a plurality of terms, various factors having different attenuation factors can be included in the two-dimensional channel profile.
Furthermore, delta C pile-up (y) and delta CBD (y) in the modified model formula above may be substituted with, for instance, Axe2x80x2*exp (xe2x88x92y/lambda 3) and Bxe2x80x2*C bulk(short) (y)*C bulk (y) respectively. In this case, Axe2x80x2 and Bxe2x80x2 represent fitting parameters that may be determined independently of each other. In addition, lambda 3 indicates the attenuation factor of the pile-up component of the impurity change quantity in the direction of the channel depth, and C bulk(short) (y) represents the one-dimensional channel profile at the channel central area of the short channel device. By making these substitutions in the modified model formula above, the pile-up component and the accelerated diffusion component of the impurity change quantity can be expressed two-dimensionally.
In the channel profile extraction method according to the present invention, the S/D profile in the direction of the channel depth may be expressed through the profile extracted through the secondary ion mass spectroscopy (hereafter referred to as the xe2x80x9cSIMSxe2x80x9d) method. In the channel profile extraction method so structured, an unknown parameter need only be set for the profile in the direction of the channel length by utilizing the profile measured through the SIMS method as the profile in the direction of the channel depth. Consequently, with the number of parameters that need to be optimized reduced, higher speed in the calculation is achieved and, at the same time, divergence of the calculation results is prevented.
It is to be noted that a structure in which the S/D profile is expressed by extending, in the direction of the channel length, the profile in the direction of the channel depth through one or more types of processing arbitrarily selected from a processing group comprising elliptic rotating processing and processing with a complementary error function may be adopted. In addition, a structure in which the S/D profile is expressed by implementing the one or more types of processing described above and then by implementing processing using a spline function may be adopted.
Furthermore, a profile extraction apparatus that is capable of executing the profile extraction method to solve the problems of the prior art described earlier may comprise a one-dimensional channel profile extraction unit which executes specific arithmetic calculation to output a one-dimensional channel profile when first electrical characteristics are input and a two-dimensional profile extraction unit which executes specific arithmetic calculation to output a two-dimensional profile when the one-dimensional channel profile and second electrical characteristics are input. In this structure, it is ideal to include the S/D profile in addition to a two-dimensional channel profile in the two-dimensional profile.